Tools › Quality › Improvement › Pareto and Root Cause › Example
NIST/SEMATECH 6.3.3.1: c chart of defects on 25 wafers
| Tool | Pareto and Root Cause |
| Source | NIST/SEMATECH (2012). "Counts Control Charts." e-Handbook of Statistical Methods. Section 6.3.3.1. |
| Level | Undergraduate |
Problem
Twenty-five wafers of 100 chips each were inspected and 400 defects counted in all. Construct the c chart and decide whether the process is in control.
Inputs to Enter
- Counts per wafer (paste as dated records with a count column): 16, 14, 28, 16, 12, 20, 10, 12, 10, 17, 19, 17, 14, 16, 15, 13, 14, 16, 11, 20, 11, 19, 16, 31, 13
Answers
- 400 defects on 25 wafers: c̄ = 16
- Limits c̄ ± 3√c̄ = 16 ± 12: UCL = 28, LCL = 4
- Wafer 24 (31 defects) is beyond the upper control limit
Notes
Paste the counts as one record per day with a count column and chart by day; not in the example selector.